Powertech Technology Brand Guidelines: A 1997 Hsinchu Memory Tester Turned Panel Packager

A 1997 tester in Hsinchu County.

Powertech Technology Inc., known as PTI and in Chinese as 力成, was established in May 1997, according to the milestone list on its own site. Its first work was testing: in August 1997, the company says, it received DRAM testing orders from Powerchip and flash testing orders from Macronix, and began memory-chip testing services. In 1998 it began building its own plant at Hsinpu, in Hsinchu County, and in 1999 it won testing orders from Toshiba for DRAM and flash.

The Kingston connection dates from the same period. In January 1999, PTI says, D.K. Tsai (Duh Kung Tsai) of the Kingston Group joined as chairman. He still chairs the company: the Taipei Times, which gives his name as Tsai Du-kung, quoted him as chairman in October 2026. Kingston Technology’s Japanese arm later sat beside PTI in a wafer-testing venture, described below.

Packaging came next. In October 2000, PTI says, it bought back-end equipment from Powerchip’s Chubei branch, added packaging to testing and began offering customers turnkey packaging and testing; in 2002 it took Toshiba flash packaging and test orders and bought land and a plant at Hukou in the Hsinchu Industrial Park. The company moved its headquarters to Hukou in 2003, listed on the Gretai over-the-counter market that April and on the Taiwan Stock Exchange in November 2004. A new building, Plant 3C, opened in November 2013 and became the headquarters, and it still is, according to PTI’s locations page.

Memory set the course for the next decade. The milestone list records wBGA packaging in volume in 2004, DDR2 production the same year, multi-chip package production and microSD cards in 2005, and a stacked-DRAM packaging development in 2007. In June 2008, the company says, it licensed IBM’s MPS-C2 technology for fine-pitch flip-chip packaging, and that year it began packaging logic chips as well as memory.

Tera Probe, Greatek and a turn to Japan.

PTI’s partnerships ran through Japan. CENS, the Taiwanese trade news service, reported on 28 July 2005 that PTI had joined the memory maker Elpida, the test-equipment supplier Advantest and Kingston Technology to form a wafer-testing venture named Tera Probe, announced by Elpida two days earlier. Elpida was to hold 33%, Kingston Technology Japan 26.8%, PTI 23.2% and Advantest 17%, and the venture was to offer wafer probing, the test step that comes before wafers are cut, CENS said. In 2008 PTI formed a Taiwanese joint venture with Tera Probe, TeraPower Technology, holding 49%, the company says.

The group widened in Taiwan and abroad. In 2009, PTI says, it bought Spansion’s multi-chip package plant in Suzhou, China, through a holding company, and renamed it Powertech Technology (Suzhou). In 2012 it bought 44% of Greatek Electronics through a public tender offer and joined its management. In 2014 it bought Nepes Pte. Ltd. of Singapore and signed agreements with Micron to provide packaging services in Xi’an, and in 2015 it set up Powertech Semiconductor (Xian). A strategic alliance with Tsinghua Unigroup, signed through a private placement in October 2015, was ended by mutual agreement in January 2017, the milestone list records.

Japan became a base in 2017. That January PTI established Powertech Technology Japan. In April it agreed with Micron to buy Micron’s 39.6% holding of Tera Probe through a public tender offer and all of Micron Akita; Tera Probe became a subsidiary in June, with 59.44% held on a consolidated basis, and Micron Akita was renamed Powertech Technology Akita in August, the company says. Its About page says the move into Japan was made to serve the local automotive-electronics and Internet-of-Things market.

PTI’s group page now says that PTI and all its subsidiaries operate entirely in Taiwan and Japan, with three non-operating holding companies in Singapore and the British Virgin Islands. Its locations page lists plants in Hukou and Hsinpu in Hsinchu County and in the Hsinchu Science Park, Greatek’s plants in Miaoli County, and Tera Probe in Yokohama with an operation centre in Kumamoto. The company says it has more than 18,000 employees.

How packaging and test companies present themselves.

Chip packaging and test companies sit between the chipmaker and the finished device. The trade calls them OSATs, for outsourced semiconductor assembly and test: they take silicon made by others, mount it, connect it, seal it and check that it works. Their customers are other technology companies, so they rarely speak to the public, and their imagery is built for engineers, buyers and investors.

That imagery leans on close-ups. Company pages and annual reports return again and again to macro shots of packaged chips and the substrates beneath them, to fine arcs of gold or copper wire bonds linking a die to its frame, and to wafers catching the light. Methods carry the names that a consumer brand would give to products: flip chip, fan-out, system in package, 2.5D and chiplet packaging.

The second register is the factory. Rows of test handlers, operators in white cleanroom suits, and long, low factory campuses in places such as Kaohsiung, Penang and Jiangsu stand for scale and reliability. Plants are often known by codes and numbers rather than names, and maps of sites across Asia, Europe and the Americas do much of the storytelling. Trade shows such as SEMICON are where these companies meet their customers face to face.

This guide sets out what can be checked about each company — who founded it, who owns it, where it works and what its record shows — and marks clearly what rests only on the company’s own word. The palettes and type here are our own interpretation, not the companies’ marks.

From memory stacks to 510-millimetre panels.

The current chapter is about panels rather than wafers. PTI broke ground in the Hsinchu Science Park in September 2018 for a plant for fan-out panel-level packaging, or FOPLP, the company says, and in November 2025 it bought another factory in the park as a base for expanding that capacity. The Taipei Times reported in July 2026 that PTI was seeking to commercialise FOPLP after a decade of development, on panels measuring 510 mm by 510 mm, and that a first phase of equipment at its Hsinchu fab was planned to give a monthly capacity of 3,000 panels.

The same report said PTI’s board had approved a plan, announced in July 2026, to create a joint venture with Broadcom in Singapore focused on finer-geometry redistribution-layer (RDL) technology for advanced package substrates; the venture had not been reported as completed at the time of writing. In October 2026 the Taipei Times quoted chairman Tsai Du-kung as saying the company had moved from a traditional memory-focused packaging and testing provider to a strategic partner for advanced packaging in the AI era, with mass production of panel-level packaging projected for late 2027 or 2028, and named AMD as one of the first customers to adopt the fan-out panel technology.

On its own pages PTI keeps a plainer register. It calls itself the world’s leading OSAT and a leading memory packaging and testing provider, both its own description, and lists its services as chip bumping, chip probing, IC assembly, final testing, burn-in and system-level assembly. Its core values are three words, Promise, Technology and Integration, and its milestone list gives a year-by-year record of plants, customer qualifications and listings. It also issues a name warning: apart from the subsidiaries and affiliates it lists, any company bearing the name 力成, “powertech” or “PTI” is unrelated to it.

For a design guide, Powertech Technology shows how a memory-testing house built its identity on customer orders, plant numbers and Japanese partnerships before turning to a new packaging format. Compare Micron, which sold PTI its Akita plant and Tera Probe holding, and AMD, an early panel-packaging customer. For this guide we use a deep green, a pale jade and a solder-gold accent with a sans, an unofficial interpretation; no product or logo is reproduced.

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